Jumat, 10 Agustus 2012

Altera VHDL basics online course

Altera is a leading corporation in the manufacture of FPGA's (Field Programmable Gate Array) , CPLD's (Complex Programmmable Logic Devices ) and ASIC's (Application Specific Integrated Circuit ) .

VHDL which stands for (VHSIC hardware description lanaguage ) is one of the hardware description languages used to program (synthesis) digital circuits on FPGA,CPLD and ASIC chips.

Altera made a nice presentation for learning the basics of the VHDL language in just 1.5 hours and it's for free , you need only to register and you can run the course online .

Objectives of the course :

  • Construct complete VHDL models .
  • Generate Logic functions using the VHDL .
  • Create hierachical VHDL designs

Course Outlines : 

  • VHDL introduction .
  • Design units .
  • Architecture modeling fundamentals .
  • VHDL logic synthesis .
  •  Hierachical designing .
You can start your course HERE (Select register at the bottom of the page to start your course )

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